Unit 2: Arithmetic Unit

Unit 2: Arithmetic Unit

Part A:

1. What is the purpose of guard bits used in floating point operations?
2. Give the booth’s recording and bit-pair recording of the number 1000111101000101.
3. Perform the division on the following 5-bit unsigned integer using non-restoring division: 10101/00101.
4. Give the IEEE standard double precision floating point format.
5. Draw the symbolic representation of the full adder and give the expression for the sum.
6. Why floating point number is more difficult to represent and process than integer?
7. Draw a full adder circuit and give the truth table.
8. Discuss the principle behind Booth’s multiplier.
9. What is ripple carry adder?

10. In conforming to the IEEE standard mention any four situations under which a processor sets exception flag.

Part B:

1. Explain in detail the principle of carry-look-ahead adder. Show how 16-bit CLAs can be constructed from 4-bit adders.
2. Explain the working of floating point adder/subtractor.
3. Multiply the following pair of signed 2’s complements nos. using bit-pair recoding of the multipliers: A = 010111, B = 101100.
4. Draw the diagram of a carry look ahead adder and explain the carry look ahead principle.
5. Explain the floating point Add/Subtract rules. With a detailed flowchart explain how floating point addition/subtraction is performed.
6. Give the block diagram of the hardware implementation of addition and subtraction of signed no and explain the operations with flowchart.
7. Explain the representations of floating point nos in detail.
8. Design a multiplier that multiplies two 4-bit nos.
9. Describe the algorithm for integer division with suitable example.
10. Describe the principle of operation of carry-look ahead adders.
11. Discuss the non-restoring division algorithm. Simulate the same for 23/5.
12. Discuss the concept of bit pair recoding.
Simulate the addition and subtraction operations (A + (OR) – B) on the operands: A = 0 10001 011011 , B = 1 01111 101010 with a five-bit signed excess-15 exponent and a six-bit normalized fractional mantissa.